HPC based Quantum Accelerators for enabling Quantum Computing on Supercomputers

C-DAC Patna is working towards development of GPU based testbed to execute Quantum Algorithms.

Brief Description

It is proposed to build Quantum Accelerator using the following technology: 
•    GPU based testbed 
•    FPGA based testbed
•    Vector based testbed 

GPU based testbed:

Design and development of GPU based quantum accelerator node for targetted quantum simulator frameworks

To scale-up and accelerate present and future version of qsim and other identified open-source quantum simulators over gpu based hpc infrastructure

The main aim of the project is building HPC Quantum Accelerators wherein a small scale
“Quantum Accelerator” is integrated with a HPC nodes to achieve computational tasks
that are otherwise beyond the reach of the Quantum Simulators available for a given
class of problem. The scope of the project is development of GPU based testbed
• GPUs offer efficient implementations of algorithms that map particularly well onto
common scientific calculations e.g. matrix-vector operations which are the core for
quantum gate operations.
• Co-design and co-development of GPU based quantum accelerator node for targeted
Quantum simulator frameworks. A GPU based testbed will be developed.
• To scale-up and accelerate present QSim and other similar open-source quantum
simulators over GPU based High-performance Computing Infrastructures.

• GPUs offer efficient implementations of algorithms that map particularly well onto
common scientific calculations e.g. matrix-vector operations which are the core for
quantum gate operations.
• Co-design and co-development of GPU based quantum accelerator node for
targeted Quantum simulator frameworks. A GPU based testbed will be developed.


Use Cases

  • Quantum Finance - Forecasting shares and market volatility
  • Quantum AI - Generating synthetic data for ethical and responsible AI
  • Quantum Cryptography - Symmetric key encryption for benchmarking.



Salient Features

The project has resulted in the development of the QARN Simulator (Quantum Accelerated and Reconfigurable Noisy Simulator), which demonstrates the following capabilities:


Simulates up to 27 qubits on a 16 GB RAM system, supporting both single-core and multi-core CPU configurations.


An upcoming version will enable the simulation of 30 qubits on a local PC.


Supports running on local GPUs, compatible with specific GPU models.


Scalable to multi-GPU and multi-node architectures for cloud-based deployments.


The QARN Simulator is powered by the proprietary ARUN algorithm (Algorithmic Rearrangement of Unshuffled Numbers), developed by the QTADG group at CDAC Patna. This innovation advances the field of HPC-based quantum accelerators, enabling more efficient simulations of quantum systems.


Chief Investigator Details

Dr. Kunal Abhishek

Email: akunal[at]cdac[dot]in

Address: C-DAC Patna, 14th Floor Biscomaun Tower, West Gandhi Maidan, Patna, Bihar 800001

Phone No.: 0612-2219021(Ext-116)


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